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Octal Transceiver/Register with 3-STATE Outputs
These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control G and direction pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control G is Active LOW. In the isolation mode (control G HIGH), A data may be stored in the B register and/or B data may be stored in the A register.
Features
Typ | Commo-Nr. | C= Bezeichnung | C= Info | Form | Editors Info | |
---|---|---|---|---|---|---|
A | -01 | |||||
B | -01 |
Vorkommen | Anzahl | Typ | Position | Bemerkung |
---|---|---|---|---|
A3000 | 9 | x | U253,U254,U255,U256,U703,U704,U705,U706,U707, | - |
A3000-T | ? | U, | - | |
A4000 | ? | U, | - | |
A4000-T | ? | U, | - |